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  1. High Performance Comparator Design using Hybrid PTL/CMOS Logic Style High Performance Comparator Design using Hybrid PTL/CMOS Logic Style

    High Performance Comparator Design using Hybrid PTL/CMOS Logic Style

    Geetanjali Sharma
    LAP LAMBERT Academic Publishing
    13.09.2013

    The main objective of this book is to provide new low power, low area and low power delay product...

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  2. A High Performance Low Power Universal Gate Implementation A High Performance Low Power Universal Gate Implementation

    A High Performance Low Power Universal Gate Implementation

    Geetanjali Sharma
    LAP Lambert Academic Publishing

    a new power reduction technique called Voltage Scaling Stacked Transistor (VS-STACK) has been pre...

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  3. Performance evaluation of wireless Communication Networks Performance evaluation of wireless Communication Networks

    Performance evaluation of wireless Communication Networks

    Geetanjali Sharma
    LAP LAMBERT Academic Publishing
    06.11.2013

    Queueing theory is an essential concept to review in light of tactical wireless communications an...

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    Unser bisheriger Preis:ORGPRICE: 61,90 €

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  4. Bite - the vertical overlap Bite - the vertical overlap

    Bite - the vertical overlap

    Geetanjali Gandhi
    LAP Lambert Academic Publishing

    The orthodontic profession has always been in pursuit of the ideal dentition which comprises of w...

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    68,00 €
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  5. Implémentation d’une porte universelle haute performance à faible consommation Implémentation d’une porte universelle haute performance à faible consommation

    Implémentation d’une porte universelle haute performance à faible consommation

    Geetanjali Sharma
    Editions Notre Savoir
    19.07.2022

    Une nouvelle technique de réduction de la puissance appelée Voltage Scaling Stacked Transistor (V...

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    39,90 €
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  6. Una implementación de puerta universal de alto rendimiento y bajo consumo Una implementación de puerta universal de alto rendimiento y bajo consumo

    Una implementación de puerta universal de alto rendimiento y bajo consumo

    Geetanjali Sharma
    Ediciones Nuestro Conocimiento
    19.07.2022

    Se ha presentado una nueva técnica de reducción de potencia denominada Transistor apilado con esc...

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    39,90 €
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  7. Uma Implementação de Portão Universal de Alto Desempenho de Baixa Potência Uma Implementação de Portão Universal de Alto Desempenho de Baixa Potência

    Uma Implementação de Portão Universal de Alto Desempenho de Baixa Potência

    Geetanjali Sharma
    Edições Nosso Conhecimento
    19.07.2022

    Foi apresentada uma nova técnica de redução de potência chamada Voltage Scaling Stacked Transisto...

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    39,90 €
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  8. Implementazione di un gate universale ad alte prestazioni e bassa potenza Implementazione di un gate universale ad alte prestazioni e bassa potenza

    Implementazione di un gate universale ad alte prestazioni e bassa potenza

    Geetanjali Sharma
    Edizioni Sapienza
    19.07.2022

    è stata presentata una nuova tecnica di riduzione della potenza chiamata Voltage Scaling Stacked ...

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    39,90 €
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  9. Eine leistungsstarke Universal-Gate-Implementierung mit geringem Stromverbrauch Eine leistungsstarke Universal-Gate-Implementierung mit geringem Stromverbrauch

    Eine leistungsstarke Universal-Gate-Implementierung mit geringem Stromverbrauch

    Geetanjali Sharma
    Verlag Unser Wissen
    19.07.2022

    Wurde eine neue Technik zur Leistungsreduzierung namens Voltage Scaling Stacked Transistor (VS-ST...

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    39,90 €
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